The present invention is directed in general to distributed processing systems and, more specifically, to means for enabling the configuration of the processing elements in a distributed processing system to come under program control.
This application is related to application Ser. No. 761,269, now U.S. Pat. No. 4,739,476, which is commonly assigned and incorporated in its entirety herein by reference.
The distributed processing system disclosed in U.S. Pat. No. 4,739,476 comprises an array of rows and columns of processor cells, referred to herein as processing elements, interconnected to enable communication between each element and its eight nearest neighboring elements. Each processing element includes a plurality of ports having addresses distinct from one another, the plurality of elements having similarly addressed ports. Data transfer operations between the processing elements in the array occur under the control of a controller in accordance with the single instruction multiple data (SIMD) format. The content of a stream of instructions from the controller is determined by the program in accordance with which the distributed processing system is operated. All processing elements in the array are coupled to receive the same instructions from the controller.
During data transfer operations, each element transmits data signals from the one of its ports having a write address identified by the controller instruction. Further, while each element receives data signals from neighboring processors on a plurality of its ports, it selects for signal processing, the signal received on the one of its ports having a read address identified by the controller instruction. As a result, all elements in the system transmit data signals from similarly addressed ports and receive, for processing, data signals on similarly addressed ports. Data transfers therefore occur throughout the array, under program control, in a single uniform direction at any instant. Further, at any instant, data transfers may occur only horizontally along each row, only vertically along each column, or only diagonally.
Thus, for such data transfers as described as described above, the variety of possible configurations of processing elements that may be achieved is generally limited by having to transmit and receive data on similarly addressed ports in all elements. As a result, the elements may only be configured to enable data propagation through the array along a plurality of parallel paths, the paths being either the processing element rows or columns or the diagonal paths formed by the elements. It may be desirable for some computations performed by the distributed processing system, to reconfigure the elements to provide other than the plurality of parallel paths described above. Further, where such a reconfiguration is sought, it would also be desirable to effect such a reconfiguration without the need for physically reconnecting any processors. It is therefore desirable to effect the reconfiguration by program control.